Multitest Develops Layer Count Reduction Concept for High Performance Test Interface Boards

Multitest’s board division announced that it has successfully introduced a new LCR (layer count reduction) concept for high pin count BGA applications. According to the company, board customers will now benefit from significant cost savings without sacrificing performance. With the new LCR concept, the layer count of standard pitch BGA boards can be reduced by up to 40 percent.

Board thickness is often additionally a mechanical issue in terms of docking height and/or connector requirements. Other approaches used to slim down boards, such as using thinner cores, are limited due to manufacturability and performance.

Multitest said its design-to-delivery PCB services leverages the capabilities of its board fabrication site and the expertise of its design team. DFM (design for manufacturability) guidelines have been developed, allowing board designers to reduce both the signal layers as well as the necessary ground planes.

The design rules for LCR have been characterized by Multitest’s signal integrity team to ensure performance: the diameter of the antipads, vias and tracing geometries are shown to have no negative impacts on PCB performance.

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